Lattice Semiconductor Corporation
08/24/2021 | News release | Distributed by Public on 08/24/2021 15:24
Redefining the FPGA for Aerospace and Defense by Solving SWaP-C Challenges
Redefining the FPGA for Aerospace and Defense by Solving SWaP-C Challenges
Posted 08/24/2021 by Luke Miller
Back when I was designing and building RADAR systems I would choose the biggest, most dense, DSP-rich FPGA available. Expense wasn't an issue as project budgets were generous, and I had been instructed to design a RADAR that met all system requirements no matter the cost. Power and thermal issues also weren't a concern as the RADAR system would have access to ample cooling resources. But that was 16 years ago, and design considerations have changed. SWaP-C (size, weight, power, and cost) concerns are major factors influencing the decision behind what types of semiconductors should be used to design new platforms for the Aerospace and Defense (A&D) market segment. A&D platforms today are more ubiquitous, smaller, and more focused on applications operating at the Edge, where keeping power consumption low is critical.
While there will continue to be A&D platforms that require the capabilities of large, power-hungry FPGAs or SoCs, they're quickly becoming the minority. Most of today's A&D platforms are targeting 'Soldier as a Sensor' applications where personnel and equipment (everything from bio-sensing wearables and night vision goggles to micro-UAVs, drones, distributed multi-static digital RADAR systems, and smart munitions) are connected via the 'Internet Battlefield of Things.' All of these platforms need to be lightweight, ubiquitous, low power, and connected to support near infinite reprogrammable missions. Low power platforms are usually lighter, making them easier for soldiers to carry in the field and enabling longer, safer, and more predictable missions.
Lattice's FPGA strategy and roadmap are well aligned with the SWaP-C challenges facing A&D developers. And a recent addition to our portfolio of low power FPGAs, Lattice CertusPro™-NX, is a compelling example of this. CertusPro-NX FPGAs were developed on the Lattice Nexus™ FPGA platform, the industry's first 28 nm FD-SOI-based platform for small, low power FPGAs. All four families of Nexus-based FPGAs launched to-date lead their class in low power consumption, small size, and reliability.
With respect to A&D, CertusPro-NX FPGAs expand the performance capabilities of Lattice FPGAs beyond the control plane, bridging, I/O expansion, and other peripheral applications they've been known for to become the primary semiconductor component in SWaP-C constrained systems. The block diagram and feature table below show just how robust CertusPro-NX devices are in terms of performance and feature support.
CertusPro-NX FPGAs are also very power efficient. For example, competing FPGAs from Xilinx and Intel use a more power hungry, six input LUT (LUT-6) architecture, while Nexus FPGAs like the CertusPro-NX use a four input LUT (LUT-4) to help keep power consumption at a minimum.
Having been a DSP/algorithm designer in the past, the most exciting aspects of the CertusPro-NX for me are the increases in memory, SERDES performance, and DSP density in comparison to previous Lattice devices. The increased performance these features provide expand their potential applications to include those in the data path. A great example of such an application is a Micro Jammer.
In this use case the Micro Jammer basically receives radio signals from the environment and replays a manipulated form of the received signal back to where it came from. The formal name of this design would be called a 'Digital RF Memory' (DRFM). The received signal could be from a RADAR, MILCOM Radios, etc. In the realm of A&D, whoever controls the spectrum will win the day.
The Micro Jammer receives IF signals, which are stored in memory, modified by a DSP, and then played back to simulate range, doppler, false targets and the like, which is then written to RAM and sent out via the DAC. Keep in mind the CertusPro-NX is in a tiny 9mm2 package and, since Lattice supports an A&D Known Good Die 'KGD' program, you could even go smaller, all powered by a battery. Not shown in the figure is the possibilities of adding PCIe, GbE or a custom data/control plane interface. There is simply no other FPGA on the market that gives the soldier this level of the coveted asymmetrical advantage!
For more information about the benefits Lattice FPGAs can bring to defense applications, please visit our Defense applications page. Or, better yet, reach out to Lattice so we can help you find the right Lattice FPGA to support your A&D platform needs.