Designed from the ground-up for work-load optimized platforms to support new server backbones that are high-bandwidth with ultra-low latency
, a pioneer in distributing data in intelligent networks, today launched its Aries portfolio of Smart Retimers for PCI Express® (PCIe®) 4.0 and 5.0 technology. The Aries Smart Retimers are designed to empower system designers to easily double the signal reach and achieve plug-and-play interoperation without compromising interconnect topologies even at 32 GT/s speeds of PCIe 5.0 technology. Astera Labs is the first to deliver working Smart Retimer SoCs for PCIe 4.0 and 5.0 applications with up to 32 bi-directional lanes.
'Astera Labs is in the business of removing bottlenecks, wherever they appear in a system,' said Jitendra Mohan, CEO, Astera Labs. 'Rather than taking an incremental approach to adding bandwidth capabilities, we took a ground-up approach to optimize our Retimers for workload-optimized platforms that demand low latency and cloud-scale management capabilities. Built in the cloud, for the cloud, with our Aries portfolio we are pioneering PCIe Smart Retimer solutions for the industry.'
Heterogeneous computing and workload-optimized platforms are redefining the connectivity backbone in the next generation of servers. This new backbone requires faster and lower-latency interconnects. The deployment of PCIe 4.0 with 16 GT/s and PCIe 5.0 with 32 GT/s helps enable this high-speed connectivity backbone, but requires a high-speed signal reach extension solution to overcome signal integrity challenges. Retimers, first defined in the PCIe 4.0 specification, compensate for the signal lost by retransmitting a fresh copy of the signal every time, effectively doubling the reach between a root-complex and end-point devices.
The Aries Smart Retimer is designed to easily eliminate signal integrity issues for PCIe 4.0 and PCIe 5.0 interconnects in data-centric applications.
- Features an innovative architecture that enables the Retimer platform to learn, automatically adapt, and select optimized adjustments for a robust link-up and plug-and-play interoperation.
- Delivers 2x lower power, significantly lower latency, and uses 2x fewer components than alternative solutions.
- Allows data center system designers to future proof their systems, delivering a reach extension solution that can easily and quickly scale from PCIe 4.0 to 5.0 architecture.
- Designed to support a wide array of system topologies and applications including all PCIe clock modes (SRIS, Common Clock, and SRNS), several bifurcation combinations (1x16, 2x8, 4x4 etc.), and the Intel® Retimer specification.
- Aries Retimers for PCIe 4.0 are currently being successfully designed-in by customers.
Astera Labs has partnered with Amazon Web Services (AWS) and TSMC, the world's largest semiconductor foundry, to produce solutions that are innovative throughout the entire supply chain.
- Operating exclusively in the cloud for product development, Astera Labs is one of the first to develop complex SoCs entirely on the cloud and achieve a high degree of operational flexibility. This approach allowed Astera Labs to accelerate time to market, reduce costs, and to conduct extensive simulations to ensure a high-quality design.
- Astera Labs partnered with TSMC to manufacture its Smart Retimers with TSMC's industry-leading process technologies, enabling it to quickly ramp production to meet customer demand.
'We are very pleased with the result of our collaboration with Astera Labs in manufacturing its Aries Smart Retimers, which are designed to improve connectivity for workload-optimized platforms,' said Bradford Paulsen, Senior Vice President of Business Management, TSMC North America. 'TSMC continues to strengthen our trinity of strengths in technology leadership, manufacturing excellence, and customer trust, which enable us to best satisfy every customer's requirements.'
The Aries Retimer Portfolio supports both PCIe 4.0 and PCIe 5.0 architectures and comes in x16 and x8 form factors.
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