02/13/2025 | Press release | Distributed by Public on 02/13/2025 21:06
In advanced technology nodes, pitch size is a critical parameter that measures the distance between identical features in a pattern on a wafer. Pitch sizes are getting smaller and smaller as more transistors are packed into a given area on a chip. As pitch sizes shrink even more, from the nanometer to angstrom range, achieving good pattern resolution becomes a real challenge.
Lam Research's Aether dry resist and development process uses a series of Lam tools before and after the extreme ultraviolet (EUV) lithography process to support smaller pitch sizes and create advanced patterns on semiconductor devices.
The Aether process is designed to overcome the traditional tradeoff between exposure dose and manufacturing defectivity in EUV lithography, leading to precise, low-defect patterning. This advancement helps drive down costs and enhance scanner productivity during chip manufacturing.
Lam is the creator of the world's only EUV dry resist deposition and dry development technologies with capabilities that surpass all other industry offerings in terms of leading-edge pattern fidelity, defectivity, material usage, and overall cost of ownership.
"Lam's dry photoresist technology provides unparalleled low-defectivity, high-resolution patterning," said Vahid Vahedi, chief technology and sustainability officer at Lam Research. "We are excited to offer this technology to imec and its partners as a critical process in the design and manufacturing of leading-edge semiconductor devices."
Applying dry resist is just one part of the overall Aether process. As shown in Figure 1, an underlayer is first deposited, then dry resist, then the wafer undergoes a clean step. After EUV lithography, during which a pattern is applied, the wafer goes through a bake/dry develop phase and a etch step.
Figure 1: The Aether dry resist and development process supports everything before and after EUV lithography.
Lam has qualified a robust EUV dry resist precursor supply chain through its partners, Gelest and Entegris, via collaborative material development.
High-volume manufacturing scale-up efforts are now underway as the advanced semiconductor industry continues adoption of this groundbreaking technology.
Aether also qualified for direct-print 28-nm pitch back end of line (BEOL) logic at 2 nm and below by imec, a leading research and innovation hub in nanoelectronics and digital technologies. Chipmakers require direct-print 28-nm pitch BEOL processing for next-generation devices.
At imec, Lam's 28-nm pitch dry resist process was paired with a low NA EUV scanner and is extendible to a high NA EUV scanner. The dry resist layer enhances EUV sensitivity and the resolution of each wafer pass.
In addition, dry resist offers key sustainability benefits by consuming less energy and five to ten times less raw materials than existing wet chemical resist processes. Lam's technology outperforms wet resist materials with exceptionally low defectivity at competitive cost.
"Lam's dry resist achieves excellent defectivity and fidelity at competitive dose," said Steven Scheer, senior vice president of process technology at imec.
Ben Eynon Jr. is senior director of marketing in the Global Product Group at Lam Research.
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